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Assistant Researcher - Electrical Engineering & Computer Sciences - Berkeley Device Modeling Center

University of California-Berkeley
United States, California, Berkeley
Mar 14, 2025
Position overview
Position title:
Assistant Researcher
Salary range:
The UC academic salary scales set the minimum pay determined by rank and step at appointment. See the following table for the current salary scale for this position: https://www.ucop.edu/academic-personnel-programs/_files/2024-25/july-2024-scales/t14-b.pdf The current full-time base salary range for this position is $120,000-$150,700. "Off-scale" salaries, which yield compensation that is higher than the published system-wide salary at the designated rank and step, are offered when necessary to meet competitive conditions.
Percent time:
100%
Anticipated start:
April 2025
Position duration:
1 year with the possibility of renewal depending on availability of funding and satisfactory performance


Application Window


Open date: March 13, 2025




Next review date: Friday, Mar 28, 2025 at 11:59pm (Pacific Time)

Apply by this date to ensure full consideration by the committee.




Final date: Tuesday, Apr 15, 2025 at 11:59pm (Pacific Time)

Applications will continue to be accepted until this date, but those received after the review date will only be considered if the position has not yet been filled.



Position description

The Berkeley Device Modeling Center (BDMC) in the Department of Electrical Engineering and Computer Sciences at the University of California, Berkeley welcomes applications for an Assistant Researcher to conduct creative and impactful research in the field of compact modeling of semiconductor devices. BDMC was established in 2012 and its faculty co-directors are Prof Chenming Hu and Prof. Sayeef Salahuddin, both of Electrical Engineering and Computer Sciences. The Center's mission is to support the research of graduate students and postdocs to develop compact models for advanced and emerging electronic devices. The Center's research results are required for designing advanced and future integrated circuits and have been a critical part of the global Electronic Design Automation ecosystem and used widely by the semiconductor industry. The center is funded by corporate sponsors' membership fees. Current members include leading semiconductor manufacturing, design and EDA companies.

Responsibilities:

The candidate will conduct independent creative and impactful research in the field of compact modeling of semiconductor devices, develop compact models for FinFET, GAA (Gate-All-Around), FDSOI (Fully-Depleted Silicon-on-Insulator), high voltage MOSFET, NCFET (Negative-Capacitance Field-Effect-Transistor), ferroelectric/anti-ferroelectric capacitors, etc., assure the accuracy and quality of the developed models, coordinate the introduction of new Silicon Integration Initiative standard compact models, collaborate with industrial users of the models and international research groups, disseminate research results through lead-authored publications in refereed conference proceedings and/or journals and participation in conferences and standard workgroups, and mentor graduate students and postdocs.

Labor Contract: https://ucnet.universityofcalifornia.edu/labor/bargaining-units/ra/index.html


Qualifications
Basic qualifications (required at time of application)

PhD or equivalent international degree at time of application

Preferred qualifications

  • PhD in Electrical Engineering or Microelectronics
  • Experience in introducing Silicon Integration Initiative standard compact models
  • Experience in developing compact models of FinFET, GAA, FDSOI and/or NCFET
  • Excellent written and oral communication skills
  • Record of peer-reviewed publications


Application Requirements
Document requirements
  • Curriculum Vitae - Your most recently updated C.V.


  • Statement of Research


  • Statement on Contributions to Diversity, Equity, Inclusion, and Belonging - Statement on your contributions to diversity, equity, inclusion, and belonging in research, teaching, and service, including information about your record of activities to date, and plans for contributing if hired at UC Berkeley. More Information and guidelines.

    (Optional)


  • (1 of 3) of your publications on compact modeling of semiconductor devices (Optional)


  • (2 of 3) of your publications on compact modeling of semiconductor devices (Optional)


  • (3 of 3) of your publications on compact modeling of semiconductor devices (Optional)


Reference requirements
  • 3 required (contact information only)

Apply link:
https://aprecruit.berkeley.edu/JPF04803

Help contact: krystle.bartholomew@berkeley.edu



About UC Berkeley

UC Berkeley is committed to diversity, equity, inclusion, and belonging. The excellence of the institution requires an environment in which the diverse community of faculty, students, and staff are welcome and included. Successful candidates will demonstrate knowledge and skill related to ensuring equity and inclusion in the activities of their academic position (e.g., teaching, research, and service, as applicable).

The University of California, Berkeley is an Equal Opportunity/Affirmative Action Employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, age, or protected veteran status.

Please refer to the University of California's Affirmative Action Policy and the University of California's Anti-Discrimination Policy.

In searches when letters of reference are required all letters will be treated as confidential per University of California policy and California state law. Please refer potential referees, including when letters are provided via a third party (i.e., dossier service or career center), to the UC Berkeley statement of confidentiality prior to submitting their letter.

As a University employee, you will be required to comply with all applicable University policies and/or collective bargaining agreements, as may be amended from time to time. Federal, state, or local government directives may impose additional requirements.

As a condition of employment, the finalist will be required to disclose if they are subject to any final administrative or judicial decisions within the last seven years determining that they committed any misconduct, are currently being investigated for misconduct, left a position during an investigation for alleged misconduct, or have filed an appeal with a previous employer.



  • "Misconduct" means any violation of the policies or laws governing conduct at the applicant's previous place of employment, including, but not limited to, violations of policies or laws prohibiting sexual harassment, sexual assault, or other forms of harassment, discrimination, dishonesty, or unethical conduct, as defined by the employer.
  • UC Sexual Violence and Sexual Harassment Policy
  • UC Anti-Discrimination Policy for Employees, Students and Third Parties
  • APM - 035: Affirmative Action and Nondiscrimination in Employment


Job location
Berkeley, CA
Applied = 0

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